The present invention relates to a process for producing a semiconductor integrated circuit device, and, more particularly, the invention relates to a technique that is effective for application to production of a semiconductor integrated circuit device having an MOSFET (metal oxide semiconductor field effect transistor) of a polymetal structure, in which a gate electrode is constituted with a laminated film of polycrystalline silicon containing boron (B) and a refractory metal.
Japanese Patent Laid-Open No. 132136/1-984 (hereinafter referred to as xe2x80x9cKobayashi 1xe2x80x9d) discloses a technique in which after forming a gate electrode of a polymetal structure containing a W film or an Mo film on an Si (silicon) substrate, light oxidation is carried out in a mixed atmosphere of steam and hydrogen to selectively oxidize only Si without oxidizing the W (Mo) film. This utilizes characteristics in which the steam/hydrogen partial pressure ratio, at which the redox reaction is at equilibrium, is different between W (Mo) and Si, and the selective oxidation of Si is realized in such a manner that the partial pressure ratio is set in a range in which, when W (Mo) is oxidized, it is immediately reduced with co-existing hydrogen, but Si remains as being oxidized. The mixed atmosphere of steam and hydrogen is formed by a bubbling method, in which a hydrogen gas is supplied into pure water contained in a container, and the steam/hydrogen partial pressure ratio is controlled by changing the temperature of the pure water.
Furthermore, other principal publications relating to selective oxidation by a group of the inventors of the above-described subject matter include Japanese Patent Laid-Open No. 89943/1985 (hereinafter referred to as xe2x80x9cKobayashi 2xe2x80x9d) and Japanese Patent-Laid-Open No. 150236/1986 (hereinafter referred to as xe2x80x9cIwataxe2x80x9d).
Japanese Patent Laid-open No. 94716/1995 (hereinafter referred to as xe2x80x9cMuraokaxe2x80x9d) discloses a technique in which, after forming a gate electrode of a polymetal structure containing a metal nitride layer, such as TiN, and a metal layer, such as W, on an Si substrate via a gate oxide film, light oxidation is carried out in an atmosphere of a reducing gas (hydrogen) and an oxidative gas (steam) diluted with nitrogen. According to this technique, it is found that only Si can be selectively oxidized without oxidizing the metal layer, and oxidation of the metal nitride layer can also be prevented because the denitrification reaction from the metal nitride layer is prevented by diluting the steam/hydrogen mixed gas with nitrogen.
In Series of Theses of 45th Symposium of Semiconductor Integrated Circuit Techniques, held on Dec. 1 and 2 of 1992, pp. 128 to 133, (hereinafter referred to as Nakamura) there is disclosed a technique for forming an oxide film in a strong reducing atmosphere containing steam synthesized by a stainless catalyst.
In a CMOS LSI, the circuit of which is constituted by a fine MOSFET having a gate length of 0.18 xcexcm or less, a gate working process using a low-resistance conductive material including a metal layer is employed to ensure high speed operation by reducing the gate delay during operation with a low voltage.
What is most likely to be the low resistance gate electrode material of this type is a polymetal obtained by laminating a refractory metal film on a polycrystalline silicon, film. Because the polymetal has a low sheet resistance of about 2 xcexa9 per square, it can be used not only as the gate electrode material), but also as an interconnecting material. As the refractory metal, W (tungsten), Mo (molybdenum) and Ti (titanium) are used, which exhibit good low resistance characteristics even in a low temperature process of 800xc2x0 C. or less and have a high electromigration resistance. When these refractory metal films are laminated directly on the polycrystalline silicon film, the adhesion strength between them may be decreased, and a silicide layer having a high resistance is formed at the interface between them during a high temperature heat treatment process. Therefore, the actual polymetal gate is constituted by a three-layer structure, in which a barrier layer comprising a metal nitride film, such as TiN (titanium nitride) and WN (tungsten nitride), is inserted between the polycrystalline silicon film and the refractory metal film.
The summary of the conventional gate working process is as follows. A semiconductor substrate is tubjected-to thermal oxidation to form a gate oxide film on the surface thereof. In general, the formation of the thermal oxide film is carried out in a dry oxygen atmosphere, but in the case of forming the gate oxide film, a wet oxidation method is employed because the defect density of the film can be decreased. In the wet oxidation method, a pyrogenic method is employed, in which hydrogenis burned in an oxygen atmosphere to form water, and the water thus formed is supplied along with oxygen to the surface of a semiconductor wafer.
However, in the pyrogenic method, because hydrogen discharged from a nozzle attached to a tip end of a hydrogen gas conduit made of quartz is ignited and burned, there is a possibility that particles are formed due to melting of the nozzle in response to heat, which can become a cause of contamination of the semiconductor wafer. Thus, a method of forming water by a catalyst method without burning has been proposed (Japanese Patent Laid-Open No. 152282/1993).
After a gate electrode material is accumulated on the gate oxide film formed by the wet oxidation method, the gate electrode material is patterned by dry etching using a photoresist as a mask. Thereafter, the photoresist is removed by ashing, and the dry etching residue and the ashing residue remaining on the surface of the substrate are removed by using an etching solution such as hydrofluoric acid.
When the wet etching described above is conducted, the gate oxide film in a region other than the lower part of the gate electrode is removed, and, at the same time, the gate oxide film at the edge of the side wall of the gate electrode is also isotropically etched to cause an undercut. Therefore, a problem of lowering the resisting voltage of the gate electrode occurs as it stands. Thus, in order to improve the profile at the edge of the side wall of a gate electrode which has been subjected to undercut, a process is conducted in which the substrate is again subjected to thermal oxidation to form an oxide film on the surface (hereinafter referred to as a light oxidation process).
However, because the refractory metal, such as W and Mo, described above is extremely liable to be oxidized in a high temperature oxygen atmosphere, when the light oxidation process is applied to a gate electrode having a polymetal structure, the refractory metal is oxidized to increase the resistance, and a part thereof is peeled from the substrate. Therefore, in the gate working process using a polymetal, means for preventing oxidation of the refractory metal during the light oxidation process is necessary.
In the process of forming the gate electrode having a polymetal structure, the light oxidation in a steam/hydrogen mixed gas having the prescribed partial pressure ratio is effective means for improving the resisting voltage of the gate oxide film and for preventing oxidation of the metal film.
However, in the conventional bubbling method, which has been proposed as a method for forming the steam/hydrogen mixed gas, because the steam/hydrogen mixed gas is formed by supplying a hydrogen gas to pure water set aside in a container, there is a possibility that foreign matter contained in the pure water will be transferred to an oxidation furnace along with the steam/hydrogen mixed gas to contaminate a semiconductor wafer.
Furthermore, in the bubbling method, because the steam/hydrogen partial pressure ratio is controlled by changing the temperature of the pure water, there are problems in that (1) the partial pressure is liable to fluctuate, and it is difficult to realize the optimum partial pressure ratio with high precision, and (2) the controllable range of the steam concentration is as narrow as from several percent to several tens of percent, and it is difficult to realize a steam concentration in a ppm order.
The redox reaction of Si and a metal using a steam/hydrogen mixed gas is liable to proceed when the steam concentration is higher, as will be described later. Therefore, when Si is oxidized under a relatively high steam concentration, such as the steam/hydrogen mixed gas formed by the bubbling method, an oxide film is grown in an extremely short period of time due to the high oxidation rate. However, in a fine MOSFET having a gate length of 0.18 xcexcm or less, it required that the gate oxide film is formed to be extremely thin, as such 3.5 nm or less, to maintain the electric characteristics of the device. Therefore, it is difficult to uniformly form such an extremely thin gate oxidized film with good controllability by using the steam/hydrogen mixed gas formed by the bubbling method. Additionally, when oxidation is conducted at a low temperature to decrease the growing rate of the oxide film, an oxide film having good quality cannot be obtained.
Furthermore, in a CMOS LSI, the circuit of which is constituted by a fine MOSFET having a gate length of 0.18 xcexcm or less, it is considered that the employment of a so-called dual gate structure is advantageous, in which, in order to suppress the fluctuation of the threshold voltage (Vth) due to operation at a low voltage as much as possible, the conductivity type of the polycrystalline silicon film constituting the gate electrode of the n-channel MISFET is set at the n-type, and the conductivity type of the polycrystalline silicon film constituting the gate electrode of the p-channel MISFET is set at the p-type. Therefore, in the case where the gate electrode is constituted by the polymetal described above, the gate electrode of the n-channel MISFET has a structure in which a refractory metal film is laminated on an n-type polycrystalline silicon film doped with an n-type impurity, such as phosphorous (P), and the gate electrode of the p-channel MISFET has a structure in which a refractory metal film is laminated on a p-type polycrystalline silicon film doped with a p-type impurity, such as boron (B).
However, because the diffusion coefficient of B (boron) as the p-type impurity is large, when the light oxidation process described above is applied to a CMOS device having the dual gate structure, there arises a problem in that B (boron) contained in the p-type polycrystalline silicon film constituting a part of the gate electrode of the p-channel MISFET diffuses into the substrate side through the extremely thin gate, oxide film having a film thickness of 3.5 nm or less, thereby to change the threshold voltage (Vth) of the p-channel MISFET.
Therefore, in a CMOS LSI employing a polymetal gate structure and a dual gate structure, it is important to develop a technique in which both the oxidation of the refractory metal and the diffusion of B (boron) into the substrate are suppressed during the light oxidation process after the gate working.
An object of the invention is to provide a light oxidation process technique in which, in a CMOS LSI employing a polymetal gate structure and a dual gate structure, both the oxidation of the refractory metal film constituting a part of the gate electrode and diffusion of boron contained in the p-type polycrystalline silicon film constituting another part of the gate electrode can be suppressed.
Another object of the invention is to provide a selective oxidation method which is applied to a semiconductor integrated circuit device having two parts, including a silicon part of a single crystal silicon or polysilicon and a part mainly comprising a refractory metal (fire resistant metal).
A further object of the invention is to provide a light oxidation process technique in which, in a semiconductor integrated circuit device having a gate containing a polysilicon layer doped with boron, both the oxidation of the refractory metal film and the diffusion of boron from the p-type polycrystalline silicon film constituting another part of the gate electrode through the gate oxide film can be suppressed.
A still further object of the invention is to provide a selective oxidation process technique in which, in a semiconductor integrated circuit device having a gate containing a polysilicon layer doped with boron, both the oxidation of the refractory metal film and the diffusion of boron from the p-type polycrystalline silicon film constituting another part of the gate electrode through the gate oxide film can be suppressed.
The above-described and other objects and novel characteristics of the invention will be apparent from the description of the present specification and attached drawings.
Among various embodiments of the invention, representative ones will be described below.
The process for producing a semiconductor integrated circuit device according to the invention comprises a step, in which a conductive film is formed comprising a gate oxide film formed on a major surface of a semiconductor substrate laminated with a polycrystalline silicon film containing boron and a refractory metal film directly or through a barrier layer, and a gate electrode of an MOSFET is formed by patterning the conductive film; and a heat treatment step, in which a mixed gas containing a hydrogen gas and steam synthesized from an oxygen gas and the hydrogen gas with a catalyst is supplied to the major surface or the vicinity of the semiconductor substrate heated to a prescribed temperature, and a profile of the gate insulating film under an edge part of the gate electrode etched on patterning in the preceding step is improved by selectively oxidizing the major surface of the semiconductor substrate, in which the heat treatment is conducted under a low thermal load condition in which the refractory metal film is substantially not oxidized, and boron contained in the polycrystalline silicon film constituting a part of the gate electrode is not diffused to the semiconductor substrate through the gate oxide film.
The substance of aspects the invention, other than those described above, will be itemized below.
1. A process for producing a semiconductor integrated circuit device comprising the steps of:
(a) forming a polycrystalline silicon film doped with boron over a gate insulating film containing a silicon oxide film formed over a silicon surface of a major surface of a semiconductor wafer (in the invention, an embodiment, in which after adhering a non-doped polycrystalline silicon film, boron is doped by ion implantation, is included. That is, the order of the doping of boron is not limited. An embodiment, in which adhering of the polycrystalline silicon film and doping of boron are simultaneously conducted, is also included, and hereinafter the same);
(b) forming a refractory metal film mainly comprising tungsten over the polycrystalline silicon film directly or via a barrier layer;
(c) forming a gate electrode by patterning the polycrystalline silicon film and the refractory metal film; and
(d) after the step (c), subjecting the silicon surface and the polycrystalline silicon film positioned in a part corresponding to an edge part of the gate electrode to a thermal oxidation treatment in a mixed gas atmosphere containing a hydrogen gas and steam.
2. A process for producing a semiconductor integrated circuit device as in the item 1, wherein the barrier layer contains a tungsten nitride film.
3. A process for producing a semiconductor integrated circuit device as in the item 2, wherein the thermal oxidation treatment in the step (d) is conducted in a condition in that the refractory metal film and the barrier layer are substantially not oxidized.
4. A process for producing a semiconductor integrated circuit device as in the item 1, wherein the gate insulating film contains a silicon oxinitride film.
5. A process for producing a semiconductor integrated circuit device comprising the steps of:
(a) forming a polycrystalline silicon film doped with boron over a gate insulating film containing a silicon oxide film formed over a silicon surface of a major surface of a semiconductor wafer;
(b) forming a refractory metal film over the polycrystalline silicon film directly or via a barrier layer;
(c) forming a gate electrode by patterning the polycrystalline silicon film and the refractory metal film; and.
(d) after the step (c), subjecting the silicon surface and the polycrystalline silicon film positioned in a part corresponding to an edge part of the gate electrode to a thermal oxidation treatment in a mixed gas atmosphere containing a hydrogen gas and steam.
6. A process for producing a semiconductor integrated circuit device as in the item 5, wherein the barrier layer is inserted between the polycrystalline silicon film and the refractory metal film.
7. A process for producing a semiconductor integrated circuit device as in the item 6, wherein the thermal oxidation treatment in the step (d) is conducted in a condition in that the refractory metal film and the barrier layer are substantially not oxidized.
8. A process for producing a semiconductor integrated circuit device comprising the steps of:
(a) forming a first conductive film mainly comprising a polycrystalline silicon film doped with boron over a silicon surface of a major surface of a semiconductor wafer;
(b) forming a refractory metal film over the first conductive film directly or via a barrier layer;
(c) forming a gate electrode by patterning the first conductive film and the refractory metal film; and
(d) after the step (c), subjecting the silicon surface and the polycrystalline silicon film positioned in a part corresponding to an edge part of the gate electrode to a thermal oxidation treatment in a mixed gas atmosphere containing a hydrogen gas and steam synthesized from an oxygen gas and a hydrogen gas.
9. A process for producing a semiconductor integrated circuit device as in the item 8, wherein the thermal oxidation treatment in the step (d) is conducted in a condition in that the refractory metal film is substantially not oxidized.
10. A process for producing a semiconductor integrated circuit device having a dual gate CMOS comprising the steps of:
(a) forming a polycrystalline silicon film doped with boron over a gate insulating film containing a silicon oxide film formed over a silicon surface of a major surface of a semiconductor wafer;
(b) forming a refractory metal film mainly comprising tungsten over the polycrystalline silicon film via a barrier layer containing tungsten nitride;
(c) forming a gate electrode by patterning the polycrystalline silicon film, the barrier layer and the refractory metal film; and
(d) after the step (c), subjecting the silicon surface and the polycrystalline silicon film positioned in a part corresponding to an edge part of the gate electrode to a thermal oxidation treatment in a mixed gas atmosphere containing a hydrogen gas and steam.
11. A process for producing a semiconductor integrated circuit device having a dual gate CMOS comprising the steps of:
(a) forming a polycrystalline silicon film doped with boron over a gate insulating film containing a silicon oxide film formed over a silicon surface of a major surface of a semiconductor wafer;
(b) forming a refractory metal film mainly comprising tungsten over the polycrystalline silicon film via a barrier layer containing tungsten nitride;
(c) forming a gate electrode by patterning the polycrystalline silicon film, the barrier layer and the refractory metal film; and
(d) after the step (c), subjecting the silicon surface and the polycrystalline silicon film to a thermal oxidation treatment in a mixed gas atmosphere having an oxidative property and a reducing property to silicon and polycrystalline silicon so as substantially not to oxidize the refractory metal film.
12. A process for producing a semiconductor integrated circuit device having a dual gate CMOS comprising the steps of:
(a) forming a polycrystalline silicon film doped with boron over a gate insulating film containing a silicon oxide film formed over a silicon surface of a major surface of a semiconductor wafer;
(b) forming a refractory metal film mainly comprising tungsten over the polycrystalline silicon film directly or via a barrier layer;
(c) forming a gate electrode by patterning the polycrystalline silicon film and the refractory metal film; and
(d) after the step (c), subjecting the silicon surface and the polycrystalline silicon film to a thermal oxidation treatment in a mixed gas atmosphere having an oxidative property and a reducing property to silicon and polycrystalline silicon so as substantially not to oxidize the refractory metal film.
13. A process for producing a semiconductor integrated circuit device having a dual gate CMOS comprising the steps of:
(a) forming a polycrystalline silicon film doped with boron over a gate insulating film containing a silicon oxide film formed over a silicon surface of a majbr surface of a semiconductor wafer;
(b) forming a refractory metal film mainly comprising tungsten over the polycrystalline silicon film via a barrier layer containing tungsten nitride;
(c) forming a gate electrode by patterning the polycrystalline silicon film, the barrier layer and the refractory metal film; and
(d) after the step (c), subjecting the silicon surface and the polycrystalline silicon film positioned in a part corresponding to an edge part of the gate electrode to a thermal oxidation treatment in a mixed gas atmosphere containing a hydrogen gas and steam so as substantially not to oxidize the refractory metal film, whereby compensating the silicon film under the edge part of the gate electrode that has been etched on patterning in the step (c).
14. A process for producing a semiconductor integrated circuit device having a dual gate CMOS comprising the steps of:
(a) forming a polycrystalline silicon film doped with boron over a gate insulating film containing a silicon oxide film formed over a silicon surface of a major surface of a semiconductor wafer;
(b) forming a refractory metal film mainly comprising tungsten over the polycrystalline silicon film via a barrier layer containing tungsten nitride; (c) forming a gate electrode by patterning the polycrystalline silicon film, the barrier layer and the refractory metal film; and
(d) after the step (c), subjecting the silicon surface and the polycrystalline silicon film positioned in a part corresponding to an edge part of the gate electrode to a thermal oxidation treatment in a mixed gas atmosphere containing a hydrogen gas and steam synthesized from an oxygen gas and a hydrogen gas so as substantially not to oxidize the refractory metal film, whereby compensating the silicon film under the edge part of the gate electrode that has been etched on patterning in the step (c).
15. A process for producing a semiconductor integrated circuit device comprising the steps of:
(a) forming a polycrystalline silicon film doped with boron over a gate insulating film containing a silicon oxide film formed over a silicon surface of a major surface of a semiconductor wafer;
(b) forming a refractory metal film mainly comprising tungsten over the polycrystalline silicon film directly or via a barrier layer;
(c) forming a gate electrode by patterning the polycrystalline silicon film and the refractory metal film; and
(d) after the step (c), subjecting the silicon surface and the polycrystalline silicon film positioned in a part corresponding to an edge part of the gate electrode to a thermal oxidation treatment in a mixed gas atmosphere containing a hydrogen gas and steam synthesized from an oxygen gas and a hydrogen gas.
16. A semiconductor integrated circuit having a dual gate CMOS comprising a gate insulating film containing a silicon oxide film formed over a silicon surface of a first major surface of a semiconductor integrated circuit wafer, having thereover a polycrystalline silicon film doped with boron and a refractory metal film laminated over the polycrystalline silicon film directly or via a barrier layer, wherein the gate insulating film is formed beyond an edge part of the polycrystalline silicon film constituting a part of the gate electrode.
17. A semiconductor integrated circuit having a dual gate CMOS comprising a gate insulating film containing a thermal oxide film over a silicon surface of a first major surface of a semiconductor integrated circuit wafer, having thereover a polycrystalline silicon film doped with boron and a refractory metal film laminated over the polycrystalline silicon film directly or via a barrier layer, wherein in the gate insulating film, the thickness of the thermal oxide film formed under an edge part of the gate electrode is larger than the thickness of the thermal oxide film formed under a central part of the gate electrode.
18. A semiconductor integrated circuit having a dual gate CMOS comprising a gate insulating film containing a silicon oxide film formed over a silicon surface of a first major surface of a semiconductor integrated circuit wafer, having thereover a polycrystalline silicon film doped with boron and a refractory metal film laminated over the polycrystalline silicon film directly or via a barrier layer, wherein the silicon oxide film formed under an edge part of the gate electrode has such a round shape that prevents concentration of an electric field.
19. A semiconductor integrated circuit having a dual gate CMOS comprising a gate insulating film containing a silicon oxide film formed over a silicon surface of a first major surface of a semiconductor integrated circuit wafer, having thereover a polycrystalline silicon film doped with boron and a refractory metal film laminated over the polycrystalline silicon film directly or via a barrier layer, wherein an edge part and a lower surface of the polycrystalline silicon film constituting a part of the gate electrode are covered with the thermal oxide film.
20. A semiconductor integrated circuit device as in the item 19, wherein the gate insulating film contains a silicon oxinitride film.
21. A process for producing a semiconductor integrated circuit device comprising the steps of: after forming, over a gate oxide film formed over a major surface of a semiconductor substrate, a conductive film comprising a polycrystalline silicon film doped with boron laminated with a high melting point film directly or via a barrier layer, forming a gate electrode of an MOSFET by patterning the conducting film; and conducting a heat treatment process by supplying a mixed gas containing a hydrogen gas and steam synthesized from an oxygen gas and a hydrogen gas with a catalyst to the major surface of the semiconductor substrate or a vicinity thereof, to selectively oxidize the major surface of the semiconductor substrate, whereby improving a profile of the gate oxide film under an edge part of the gate electrode that has been etched on the patterning, wherein said heat treatment is conducted under a condition in that the refractory metal film is substantially not oxidized, and boron contained in the polycrystalline silicon film constituting a part of the gate electrode is not diffused to the semiconductor substrate through the gate oxide film.
22. A process for producing a semiconductor integrated circuit device as in the item 21, wherein the refractory metal film comprises tungsten, and the barrier layer comprises tungsten nitride.
23. A process for producing a semiconductor integrated circuit device as in the item 21, wherein the gate oxide film under a central part of the gate electrode has a thickness of 3.5 nm or less.
24. A process for producing a semiconductor integrated circuit device as in the item 21, wherein the gate electrode has a gate length of 0.18 xcexcm or less.
25. A process for producing a semiconductor integrated circuit device as in the item 22, wherein the heat treatment is conducted at a temperature of from 650 to 900xc2x0 C.
26. A process for producing a semiconductor integrated circuit device as in the item 22, wherein the heat treatment is conducted at a temperature of from 750 to 900xc2x0 C.
27. A process for producing a semiconductor integrated circuit device as in the item 22, wherein the heat treatment is conducted at a temperature of about 850xc2x0 C.
28. A process for producing a semiconductor integrated circuit device as in the item 26, wherein the mixed gas has a moisture concentration of from 1 to 50%.
29. A process for producing a semiconductor integrated circuit device as in the item 27, wherein the mixed gas has a moisture concentration of about 50%.
30. A process for producing a semiconductor integrated circuit device as in the item 22, wherein the mixed gas has a reduced pressure of 700 Torr or less.
31. A process for producing a semiconductor integrated circuit device as in the item 22, wherein the mixed gas has a normal pressure of from 700 to 800 Torr.
32. A process for producing a semiconductor integrated circuit device as in the item 22, wherein the mixed gas has a positive pressure of 800 Torr or more.
33. A process for producing a semiconductor integrated circuit device comprising the steps of:
(a) after forming a gate oxide film over a major surface of a semiconductor substrate, forming a polycrystalline silicon film over the gate oxide film;
(b) forming a p-type polycrystalline silicon film by doping the polycrystalline silicon film in a first region of the semiconductor substrate with a p-type impurity containing boron, and forming an n-type polycrystalline silicon film by doping the polycrystalline silicon film in a second region of the semiconductor substrate with an n-type impurity;
(c) forming a refractory metal film over each of the p-type polycrystalline silicon film and the n-type polycrystalline silicon film directly or via a barrier layer;
(d) by patterning the p-type polycrystalline silicon film, the n-type polycrystalline silicon film and the refractory metal film formed thereon, forming a first gate electrode of a p-channel MOSFET constituted by the p-type polycrystalline silicon film and the refractory metal film in the first region of the semiconductor substrate, and forming a second gate electrode of an n-channel MOSFET constituted by the n-type polycrystalline silicon film and the refractory metal film in the second region of the semiconductor substrate; and
(e) conducting a heat treatment process by supplying a mixed gas containing a hydrogen gas and steam synthesized from an oxygen gas and a hydrogen gas with a catalyst to the major surface of the semiconductor substrate or a vicinity thereof, to selectively oxidize the major surface of the semiconductor substrate in a condition in that the refractory metal film constituting a part of each of the first gate electrode and the second gate electrode is substantially not oxidized, and boron contained in the p-type polycrystalline silicon film constituting another part of the first gate electrode is not diffused into the semiconductor substrate through the gate oxide film, whereby improving a profile of the gate oxide film under edge parts of each of the first gate electrode and the second gate electrode that has been etched on the patterning.
34. A process for producing a semiconductor integrated circuit device as in the item 33, wherein the refractory metal film comprises tungsten, and the barrier layer comprises tungsten nitride.
35. A process for producing a semiconductor integrated circuit device as in the item 33, wherein the gate oxide film under central parts of each of the first gate electrode and the second gate electrode has a thickness of 3.5 nm or less.
36. A process for producing a semiconductor integrated circuit device as in the item 33, wherein each of the first gate electrode and the second gate electrode has a gate length of 0.18 xcexcm or less.
Furthermore, the substance of another aspect of the invention will be described below.
37. A process for producing an integrated circuit device comprising the steps of:
(a) forming a first region mainly comprising silicon doped with boron over a first insulating film over a first major surface of a semiconductor wafer; and
(b) conducting a thermal oxidation treatment to the first region in a mixed gas atmosphere containing a hydrogen gas and steam in a condition in that a refractory metal region on the first major surface is substantially not oxidized.
38. A process for producing an integrated circuit device as in the item 37, wherein the refractory metal region is formed over the first region.
39. A process for producing an integrated circuit device as in the item 38, wherein the mixed gas atmosphere contains a nitrogen gas.
40. A process for producing an integrated circuit device as in the item 39, wherein the doping of boron is conducted by implantation of an ion into the first region.
41. A process for producing a semiconductor integrated circuit device having a dual gate CMOS comprising the steps of:
(a) forming a polycrystalline silicon film over a gate insulating film containing a silicon oxide film formed over a silicon surface of a major surface of a semiconductor wafer;
(b) forming a refractory metal film over the polycrystalline silicon film via a barrier layer;
(c) forming a gate electrode by patterning the polycrystalline silicon film, the barrier layer and the refractory metal film; and
(d) after the step (c), subjecting the polycrystalline silicon film to a thermal oxidation treatment in a mixed gas atmosphere containing a hydrogen gas and steam and having a moisture concentration in a range of from 5% to such a maximum concentration that the refractory metal film is substantially not oxidized.
42. A process for producing a semiconductor integrated circuit device having a dual gate CMOS as in the item 41, wherein the moisture concentration of the mixed gas atmosphere is from 8 to 25% (from 8.7% to 33% in the partial pressure representation).